Currently, the most typical platforms for signal processing are graphics processing units (GPU), digital signal processors (DSP), field programmable gate arrays (FPGA), and some highly specialized integrated circuits such as artificial neuromorphic networks. However, even these dedicated computational platforms cannot follow the increasing demand for high performance signal processing [D. B. Strukov and K. K. Likharev, IEEE Trans. Nanotechnology, vol. 6, pp. 696-710, 2007]. It was recently suggested that memristive devices could form the basis of more efficient processors and circuits which will be able to meet future demand in high performance signal processing.
A memristor is a 2-terminal electrical circuit element that changes its resistance depending on the total amount of charge that flows through the device. A memristance naturally arises in thin-film semiconductors for which electronic and dopant equations of motion are coupled in the presence of an applied electric field [D. B. Strukov, et al., “The missing memristor found,” Nature, vol. 453, pp. 80-83, 2008]. This property is common for nanoscale films and has been observed in a variety of material systems, e.g. transition metal oxides, perovskites, various superionic conductors composed of chalcogenides and metal electrodes, and organic polymer films (see, e.g., [G. Dearnaley, et al., “Electrical phenomena in amorphous oxide films,” Rep. Prog. Phys., 33, 1129 (1970)], [R. Waser, et al., Advanced Materials, vol. 21, pp. 2632-2663 (2009)], [B. Strukov, in: Nanoelectronics and Photonics, Berlin: Springer, pp. 15-57, 2008], [K. K. Likharev, J. Nanoelectronics and Optoelectronics, vol. 3, pp. 203-230 (2008)]). While memristance has been observed experimentally for at least fifty years before it was recognized as such, it has now become interesting for a variety of digital and analog applications, especially because of the nonvolatility of a true memristor. These properties arise from the defining equations for memristive systems, i.e. v=R(w,i) i, and dw/dt=f(w,i) where v is the voltage, i is the current, R is the instantaneous resistance and w is a state variable (or variables). The memristive device, when switched between its extreme ON and OFF states, can be thought of as a binary resistance switch. Yet, the memristor's true potential is utilized when it is used in analog regime, i.e. with continuous range of resistance states.
There is a wide range of material systems which exhibit memristive properties. This type of behavior has been experimentally observed in, for example: organic films (see, for a nonlimiting example, [B. Zhitenev, et al., Nature Nanotech., vol. 2, pp. 237-242 (2007)] and U.S. Pat. No. 7,443,711 “Non-volatile programmable impedance nanoscale devices” Issued to Duncan R. Stewart, et al., on Oct. 28, 2008) that contain charged dopants or molecules with mobile charged components; chalcogenides (see, e.g., [K. Terabe, et al., “Quantized conductance atomic switch,” Nature, vol. 433, pp. 47-50 (2005)]) where switching was attributed to ion migration rather than a phase transition; and metal oxides (see, e.g., [Jameson, J. R. et al. Appl. Phys. Lett., vol. 91, pp. 112101 (2007)] and [A. Beck, et al., Appl. Phys. Lett. vol. 77, pp. 139-141 (2000)]), notably TiO2 and various perovskites.
There are several problems preventing the practical applications of memristive devices at present, namely unrepeatability and unreliability of memristive devices. There are two main sources of these problems: 1) electroforming process, and 2) imperfection (roughness, variation in passivation state, etc.) of interfaces in the resistive switching process.
The least understood, and most problematic, step in the operation of metal oxide switches is the ‘electroforming’ process, a one-time application of high voltage or current (a necessary step in the “activation” of memristive devices) that produces a significant change in electronic conductivity. After electroforming process metal-oxide-metal (MOM) memristors exhibit a wide variance of IV characteristics. J. J. Yang et al., [“The mechanism of electroforming of metal oxide memristive switches.” Nanotechnology 20, 215201 (2009)] experimentally demonstrated that electroforming of MOM switches is an electro-reduction and drift process during which oxygen vacancies are created and drift towards the cathode forming localized conducting channels in the oxide film. Simultaneously, O2− ions drift towards the anode and are discharged there, evolving O2 gas and causing physical deformation of the junction. J. J. Yang et al further demonstrated that the problematic physical deformation can be reduced by shrinking the junction size to the nanoscale (100 nm or below) and further showed that the forming process can be minimized by restricting the insulating TiO2 oxide to a very thin (few nm) layer in combination with thick but conductive oxide layer (TiOx layer).
Another critical source of unrepeatability and unreliability of memristive devices to date is associated with electrode/switching layer interface quality. Xia et al. [Nano Lett. 2010, 10, 2909-2914] suggested a process in which the two electrodes and the switching layer are being deposited in one step, without exposing the various layers to ambient. The key process in this approach is glancing angle deposition of layers, with which bottom and top electrodes can be deposited with the same photoresist pattern by properly aligning the pattern with respect to the direction of deposition. A variation of this fabrication concept was suggested by K. Michelakis et al. [Micro & Nano Letters, 2010, Vol. 5, Iss. 2, pp. 91-94]. It was shown that such an approach indeed provides more repeatable memristive devices, although the glancing angle deposition also resulted in higher surface roughness and more studies are needed to identify the extent of the improvement in reliability and repeatability of such a process.
U.S. patent application Ser. No. 11/542,986 “Electrically Actuated Switch” by S. R. Williams filed on Oct. 3, 2006 is teaching a memristive device (“electrically actuated switch” according to the terminology taught in this patent application), which comprises a first electrode, a second electrode, and an active region disposed in between. The active region comprises at least one primary active region comprising at least one material that can be doped or undoped to change its electrical conductivity, and a secondary active region comprising at least one material for providing a source/sink of ionic species that act as dopants for the primary active region(s). The deficiency of the memristive device according to U.S. patent application Ser. No. 11/542,986 is tight control of interface properties required to achieve reliability of such a device combined with poor repeatability of such a device associated with intrinsic poor repeatability of electroforming process required to activate such a memristive device.
U.S. Pat. No. 7,846,807 “Method for forming memristor material and electrode structure with memristance” by Tang et al. issued on Dec. 7, 2010 is teaching an ion implantation as a method of forming a doped layer within an oxide layer in memristive device. The ion implantation step is taught to be performed between the deposition of the oxide layer and forming a second electrode over the oxide layer. Such a method of fabrication of memristor device have following deficiencies: the ion implantation between oxide layer deposition and top electrode deposition may result in potentially non-ideal interface between the doped oxide layer and the top electrode (potentially resulting in high variability of such a memristive device), while intrinsic poor repeatability of electroforming process, which is required in such a method may result in poor repeatability of a such memristive device.
U.S. Pat. No. 7,985,962 “Memristive Device” by Bratkovski et al., filed on Dec. 23, 2008 and issued on Jul. 26, 2011 is teaching a memristive device includes a first electrode, a second electrode, and an active region disposed between the first and second electrodes. At least one of the first and second electrodes is a metal oxide electrode, with one method of forming metal oxide electrode being taught as an ion implantation. The memristive device according to the patent application may have similar deficiencies to previously discussed prior art memristive devices.
U.S. patent application Ser. No. 12/753,715 “Programmable Crosspoint Device with an Integral Diode” by J. Yang et al. filed on Apr. 2, 2010 is teaching a programmable crosspoint device with an integral diode, said device includes a first crossbar, a second crossbar, a metallic interlayer, and a switching oxide layer interposed between the first crossbar and the metallic interlayer. A method for forming a programmable crosspoint device with an integrated diode is also provided, and ion implantation is listed as one of the methods that can be used to provide a desired concentration of dopants in the switching oxide layer. However, the method of fabrication of the memristive device according to this patent application is expected to have similar deficiencies to reviewed above inventions of unreliability and unrepeatability due to imperfect interfaces and required electroforming process.
U.S. patent application Ser. No. 13/142581 “Memristive Transistor Memory” by D. Strukov et al. filed on Jan. 30, 2009 is teaching a memory device that includes a semiconductor wire including a source region, a drain region, and a channel region between the source region and the drain region. A gate structure that overlies the channel region includes a memristive portion and a conductive portion overlying the memristive portion. It further teaches doping source/drain regions in the semiconductor wires using the gate wires to mask the implanting. However, this application does not specifically address the issues of nonrepeatibility and unreliability of memristors due to nonperfect interfaces and electroforming process.
U.S. patent application Ser, No. 13/142,583 “Controlled Placement of Dopants in Memristor Active Regions” by N. J. Quitoriano et al., field on Jan. 26, 2009 is teaching various embodiments of the reconfigurable memristor devices. In one aspect, a memristor device comprises an active region sandwiched between a first electrode and a second electrode. The active region including a non-volatile dopant region selectively formed and positioned within the active region, and one of the taught methods of forming such a region is by ion implantation. However, again, the memristor device according to the referenced patent application are not expected to be fully solved, since the suggested implantation profile was uniform in parallel to the wafer direction (thus require electroforming process).
U.S. patent application Ser. No. 13/130,815 “Multilayer Memristive Devices” by W. Tong et al., filed on Jan. 20, 2009 is teaching a multilayer memristive device that includes a first electrode; a second electrode; a first memristive region and a second memristive region which created by directional ion implantation of dopant ions and are interposed between the first electrode and the second electrode; and mobile dopants which move within the first memristive region and the second memristive region in response to an applied electrical field. While this invention provides the means to localize the ionic channel in one dimension (into a possibly narrower than that width of the top electrode), the absence of localization of the ionic channel (or filament, in other terminology) into perpendicular direction is expected to still result in substantial level of nonrepeatability and possibly non-reliability of memristive devices designed/fabricated according to the U.S. patent application Ser. No. 13/130,815.
U.S. patent application Ser. No. 13/142,504 “Electrically Actuated Device” by M. D. Pickett et al. filed on Jun. 28, 2011, which is a continuation of application No. PCT/US09/32496, filed on Jan. 29, 2009 is teaching an electrically actuated device that includes a first electrode and a second electrode crossing the first electrode at a non-zero angle, thereby forming a junction therebetween. A material is established on the first electrode and at the junction. At least a portion of the material is a matrix region. A current conduction channel extends substantially vertically between the first and second electrodes, and is defined in at least a portion of the material positioned at the junction. The current conduction channel has a controlled profile of dopants therein. According to some of the embodiments of this patent application the current conduction channel is being fabricated by ion implantation through the mask formed by the top electrode with possible post-implantation annealing to allow controlled diffusion of the dopants into the area shadowed by the top electrode line. However, similarly to the case of U.S. patent application Ser. No. 13/130,815 reviewed above, the efficient two-dimensional localization of the conduction channel is not straightforwardly achievable with such a method.
To summarize, while variations upon cycling the device and yield problems associated with memristive device fabrication were identified and some progress was made in overcoming each of these problems independently, no fabrication process has been suggested/demonstrated to date that would be capable of solving both these issues at the same time.